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Publikationen

Zeige Ergebnisse 51 bis 60 von 13704.
  1. On What Depends the Robustness of Multi-source Models to Missing Data in Earth Observation?

    In: IEEE International Geoscience and Remote Sensing Symposium 2025. IEEE International Geoscience and Remote Sensing Symposium (IGARSS-2025), August 3-8, Brisbane, Australia, IEEE, 2025.

  2. Designing Memory Protection for a RISC-V Nano-VP

    In: Proceedings of the 3rd Workshop on Nano Security: From Nano-Electronics to Secure Systems (NanoSec'25). Workshop on Nano Security: From Nano-Electronics to Secure Systems (NanoSec-25), March 29 - April 2, Lyon, France, 2025.

  3. Optimizing Hardware for Neural Network Inference using Virtual Prototypes

    In: RISC-V Summit Europe. RISC-V Summit Europe, May 12-15, Paris, France, 2025.

  4. Kemal Çağlar Coşkun; Chandan Jha; Muhammad Hassan; Rolf Drechsler

    Formal Verification of Error Bounds for Resistive-Switching-based Multilevel Matrix-Vector Multipliers

    In: 26th International Symposium on Quality Electronic Design (ISQED'25). International Symposium on Quality Electronic Design (ISQED-2025), April 23-25, San Francisco, USA, 2025.

  5. Till Schnittka; Chandan Jha; Sallar Ahmadi-Pour; Rolf Drechsler

    RIVER: Sneak Path Aware READ-based In-Memory Computing for 1T1M Memristive Crossbars

    In: 28th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS). IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS-2025), May 5-7, Lyon, France, 2025.

  6. Karl Aaron Rudkowski; Sallar Ahmadi-Pour; Rolf Drechsler

    CrosSym: Cross-Level Verification of SystemC Peripherals using Symbolic Execution

    In: 28th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS). IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), May 5-7, 2025.

  7. LLM-assisted Performance Estimation of Embedded Software on RISC-V Processors

    In: 28th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS). IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS-2025), May 5-7, Lyon, France, 2025.

  8. Multi-Input MAGIC Synthesis and Verification for In-Memory Computing Design

    In: IEEE International Symposium on Multiple-Valued Logic (ISMVL). IEEE International Symposium on Multiple-Valued Logic (ISMVL-2025), June 5-6, Montreal, Canada, 2025.

  9. Hideaki Kanayama; Mahdi Chamseddine; Suresh Guttikonda; So Okumura; Soichiro Yokota; Didier Stricker; Jason Raphael Rambach

    ToF-360 – A Panoramic Time-of-flight RGB-D Dataset for Single Capture Indoor Semantic 3D Reconstruction

    In: IEEE/CVF (Hrsg.). 21st. CVPR Workshop on Perception Beyond the Visible Spectrum (PBVS-2025), June 11-15, Nashville, Tennessee, USA, IEEE, 2025.